| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 6 Pin |
| Current Rating | 350 mA |
| Case/Package | TSOT-23-6 |
| Number of Positions | 6 Position |
| Drain to Source Resistance (on) (Rds) | 1 Ω |
| Polarity | N-Channel, P-Channel, Dual N-Channel, Dual P-Channel |
| Power Dissipation | 960 mW |
| Threshold Voltage | 2.1 V |
| Drain to Source Voltage (Vds) | 60 V |
| Breakdown Voltage (Drain to Source) | 60.0 V |
| Breakdown Voltage (Gate to Source) | ±20.0 V |
| Continuous Drain Current (Ids) | 510 mA |
| Input Capacitance (Ciss) | 20pF @25V(Vds) |
| Input Power (Max) | 700 mW |
| Operating Temperature (Max) | 150 ℃ |
| Operating Temperature (Min) | -55 ℃ |
| Power Dissipation (Max) | 0.96 W |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tape & Reel (TR) |
| Size-Length | 3 mm |
| Size-Width | 1.7 mm |
| Size-Height | 1 mm |
| Operating Temperature | -55℃ ~ 150℃ (TJ) |
The NDC7001C is a dual N/P-channel enhancement-mode FET produced using high cell density and DMOS technology. This very high density process has been designed to minimize ON-state resistance, provide rugged and reliable performance and fast switching. This device is particularly suited for low voltage, low current, switching and power supply applications.
● High saturation current
● High density cell design for low RDS (ON)
● Design using copper lead-frame for superior thermal and electrical capabilities
Fairchild
8 Pages / 0.15 MByte
Fairchild
10 Pages / 0.26 MByte
Fairchild
8 Pages / 0.14 MByte
Fairchild
3 Pages / 0.48 MByte
Fairchild
1 Pages / 0.14 MByte
Fairchild
Dual N & P-Channel Enhancement Mode Field Effect Transistor
Fairchild
Trans MOSFET N/P-CH 60V 0.51A/0.34A 6Pin SuperSOT T/R
ON Semiconductor
MOSFET N+P 60V 340mA SSOT6
Fairchild
MOSFET Dual N/P Channel FET Enhancement Mode
TI
510mA, 50V, 2 CHANNEL,N AND P-CHANNEL, Si, SMALL SIGNAL, MOSFET
Part Datasheet PDF Search
72,405,303 Parts Datasheet PDF, Update more than 5,000 PDF files ervery day.
