| TYPE | DESCRIPTION |
|---|
| Mounting Style | Through Hole |
| Number of Pins | 3 Pin |
| Case/Package | TO-220-3 |
| Number of Positions | 3 Position |
| Drain to Source Resistance (on) (Rds) | 0.025 Ω |
| Power Dissipation | 100 W |
| Threshold Voltage | 2 V |
| Drain to Source Voltage (Vds) | 60 V |
| Rise Time | 320 ns |
| Input Capacitance (Ciss) | 2000pF @25V(Vds) |
| Input Power (Max) | 100 W |
| Fall Time | 161 ns |
| Operating Temperature (Max) | 175 ℃ |
| Operating Temperature (Min) | -65 ℃ |
| Power Dissipation (Max) | 100000 mW |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Rail, Tube |
| Operating Temperature | -65℃ ~ 175℃ |
The NDP6060L is a logic level N-channel enhancement-mode power FET produced using Fairchild"s proprietary high cell density DMOS technology. This very high density process has been especially tailored to minimize ON-state resistance, provide superior switching performance and withstand high energy pulses in the avalanche and commutation modes. It is particularly suited for low voltage applications such as DC-to-DC converters and other battery powered circuits where fast-switching, low in-line power loss and resistance to transients are needed. The rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor.
● Low drive requirements allowing operation directly from logic drivers
● Critical DC electrical parameters specified at elevated temperature
● High density cell design for extremely low RDS (ON)
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