PTN3360ABS Datasheet PDF - NXP

Overview

●The PTN3360A is a high-speed level shifter device which converts four lanes of low-swing AC-coupled differential input signals to DVI v1.0 and HDMI v1.3a compliant open-drain current-steering differential output signals, up to 2.5 Gbit/s per lane. Each of these lanes provides a level-shifting differential buffer to translate from low-swing AC-coupled differential signaling on the source side, to TMDS-type DC-coupled differential current-mode signaling terminated into 50 Ω to 3.3 V on the sink side. Additionally, the PTN3360A provides a single-ended active buffer for voltage translation of the HPD signal from 5 V on the sink side to 1.1 V on the source side and provides a channel for level shifting of the DDC channel (consisting of a clock and a data line) between 3.3 V source-side and 5 V sink-side. The DDC channel is implemented using pass-gate technology providing level shifting as well as disablement (isolation between source and sink) of the clock and data lines.

●The low-swing AC-coupled differential input signals to the PTN3360A typically come from a display source with multi-mode I/O, which supports multiple display standards, e.g., DisplayPort, HDMI and DVI. While the input differential signals are configured to carry DVI or HDMI coded data, they do not comply with the electrical requirements of the DVI v1.0 or HDMI v1.3a specification. By using PTN3360A, chip set vendors are able to implement such reconfigurable I/Os on multi-mode display source devices, allowing the support of multiple display standards while keeping the number of chip set I/O pins low.

●The PTN3360A main high-speed differential lanes feature low-swing self-biasing differential inputs which are compliant to the electrical specifications of _DisplayPort Standard v1.1_and/or _PCI Express Standard v1.1_, and open-drain current-steering differential outputs compliant to DVI v1.0 and HDMI v1.3a electrical specifications. The I²C-bus channel level-translates the DDC signals between 3.3 V (source) and 5.0 V (sink).

●The PTN3360A is a fully featured HDMI as well as DVI level shifter. It is functionally equivalent to PTN3300A but provides higher speed performance and higher ESD robustness. The PTN3360A is also equivalent to PTN3360B with the exception that PTN3360A provides inverting level shifting on the HPD channel.

●PTN3360A is powered from a single 3.3 V power supply consuming a small amount of power (120 mW typ.) and is offered in a 48-terminal HVQFN48 package.

●MoreLess

●## Features

●High-speed TMDS level shifting

● Converts four lanes of low-swing AC-coupled differential input signals to DVI v1.0 and HDMI v1.3a compliant open-drain current-steering differential output signals

● TMDS level shifting operation up to 2.5 Gbit/s per lane (250 MHz character clock)

● Integrated 50 Ω termination resistors for self-biasing differential inputs

● Back-current safe outputs to disallow current when device power is off and monitor is on

● Disable feature to turn off TMDS inputs and outputs and to enter low-power state

●DDC level shifting

● Integrated DDC level shifting (3.3 V source to 5 V sink side)

● 0 Hz to 400 kHz I²C-bus clock frequency

● Back-power safe sink-side terminals to disallow backdrive current when power is off or when DDC is not enabled

●HPD level shifting

● HPD inverting level shift from 0 V on the sink side to 1.1 V on the source side, or from 5 V on the sink side to 0 V on the source side

● Integrated 200 kΩ pull-down resistor on HPD sink input guarantees "input LOW" when no display is plugged in

● Back-power safe design on HPD_SINK to disallow backdrive current when power is off

●General

● Power supply 3.3 V +- 10 pct

● ESD resilience to 8 kV HBM, 500 V CDM

● Power-saving modes (using output enable)

● Back-current-safe design on all sink-side main link, DDC and HPD terminals

● Transparent operation: no re-timing or software configuration required

●## Features