512 Megabit, 256 Megabit, and 128 Megabit, 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit™ Process Technology
●General Description
●The S29GL512/256/128N family of devices are 3.0V single power flash memory manufactured using 110 nm MirrorBit technology. The S29GL512N is a 512 Mbit, organized as 33,554,432 words or 67,108,864 bytes. The S29GL256N is a 256 Mbit, organized as 16,777,216 words or 33,554,432 bytes. The S29GL128N is a 128 Mbit, organized as 8,388,608 words or 16,777,216 bytes. The devices have a 16-bit wide data bus that can also function as an 8-bit wide data bus by using the BYTE# input. The device can be programmed either in the host system or in standard EPROM programmers.
●Distinctive Characteristics
●Architectural Advantages
●■ Single power supply operation
● — 3 volt read, erase, and program operations
●■ Enhanced VersatileI/O™ control
● — All input levels (address, control, and DQ input levels) and outputs are determined by voltage on VIO input. VIO range is 1.65 to VCC
●■ Manufactured on 110 nm MirrorBit process technology
●■ Secured Silicon Sector region
● — 128-word/256-byte sector for permanent, secure identification through an 8-word/16-byte random Electronic Serial Number, accessible through a command sequence
● — May be programmed and locked at the factory or by the customer
●■ Flexible sector architecture
● — S29GL512N: Five hundred twelve 64 Kword (128 Kbyte) sectors
● — S29GL256N: Two hundred fifty-six 64 Kword (128 Kbyte) sectors
● — S29GL128N: One hundred twenty-eight 64 Kword (128 Kbyte) sectors
●■ Compatibility with JEDEC standards
● — Provides pinout and software compatibility for single-power supply flash, and superior inadvertent write protection
●■ 100,000 erase cycles per sector typical
●■ 20-year data retention typical
●Performance Characteristics
●■ High performance
● — 90 ns access time (S29GL128N, S29GL256N)
● — 100 ns (S29GL512N)
● — 8-word/16-byte page read buffer
● — 25 ns page read times
● — 16-word/32-byte write buffer reduces overall programming time for multiple-word updates
●■ Low power consumption (typical values at 3.0 V, 5 MHz)
● — 25 mA typical active read current;
● — 50 mA typical erase/program current
● — 1 µA typical standby mode current
●■ Package options
● — 56-pin TSOP
● — 64-ball Fortified BGA
●Software & Hardware Features
●■ Software features
● — Program Suspend and Resume: read other sectors before programming operation is completed
● — Erase Suspend and Resume: read/program other sectors before an erase operation is completed
● — Data# polling and toggle bits provide status
● — Unlock Bypass Program command reduces overall multiple-word programming time
● — CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices
●■ Hardware features
● — Advanced Sector Protection
● — WP#/ACC input accelerates programming time (when high voltage is applied) for greater throughput during system production. Protects first or last sector regardless of sector protection settings
● — Hardware reset input (RESET#) resets device
● — Ready/Busy# output (RY/BY#) detects program or erase cycle completion
