SN74AVCH8T245DGVR Datasheet PDF - TI

● Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage

● VCC Isolation Feature — If Either VCC Input Is at GND, All I/O Ports Are in the High-Impedance State

● Ioff Supports Partial-Power-Down Mode Operation

● Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range

● I/Os Are 4.6-V Tolerant

● Max Data Rates:

● 320 Mbps (VCCA ≤ 1.8 V and VCCB ≤ 1.8 V)

● 170 Mbps (VCCA ≥ 1.8 V or VCCB ≥ 1.8 V)

● Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors

● Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

● ESD Protection Exceeds JESD 22

● 8000-V Human-Body Model (A114-A)

● 200-V Machine Model (A115-A)

● 1000-V Charged-Device Model (C101)