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SN74F112N
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SN74F112N Datasheet PDF (13 Pages)
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SN74F112N Specifications

SN74F112N Size & Package

SN74F112N Documents

TI
13 Pages / 0.62 MByte
TI
29 Pages / 0.44 MByte

SN74F112 Documents

TI
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
TI
TEXAS INSTRUMENTS SN74F112N Flip-Flop, Complementary, Differential, Negative Edge, 74F112, JK, 4.6ns, 100MHz, 20mA, DIP
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC
TI
TEXAS INSTRUMENTS SN74F112D Flip-Flop, 74F112, JK, 4.6ns, 130MHz, 20mA, SOIC
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOP T/R
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOP T/R
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC T/R
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin PDIP Tube
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC T/R
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOP T/R
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