The TL16C752B is a dual universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs, automatic hardware/software flow control, and data rates up to 3 Mbps. The TL16C752B offers enhanced features. It has a transmission control register (TCR) that stores receiver FIFO threshold levels to start/stop transmission during hardware and software flow control. With the FIFO RDY register, the software gets the status of TXRDY/RXRDY for all four ports in one access. On-chip status registers provide the user with error indications, operational status, and modem interface control. System interrupts may be tailored to meet user requirements. An internal loopback capability allows onboard diagnostics.
●The UART transmits data, sent to it over the peripheral 8-bit bus, on the TX signal and receives characters on the RX signal. Characters can be programmed to be 5, 6, 7, or 8 bits. The UART has a 64-byte receive FIFO and transmit FIFO and can be programmed to interrupt at different trigger levels. The UART generates its own desired baud rate based upon a programmable divisor and its input clock. It can transmit even, odd, or no parity and 1, 1.5, or 2 stop bits. The receiver can detect break, idle, or framing errors, FIFO overflow, and parity errors. The transmitter can detect FIFO underflow. The UART also contains a software interface for modem control operations, and has software flow control and hardware flow control capabilities.
●The TL16C752B is available in a 48-pin PT (LQFP) package.
● Pin Compatible With ST16C2550 With Additional Enhancements
● Up to 1.5 Mbps Baud Rate When Using Crystal (24-MHz Input Clock)
● Up to 3 Mbps Baud Rate When Using Oscillator or Clock Source
●(48-MHz Input Clock)
● 64-Byte Transmit FIFO
● 64-Byte Receive FIFO With Error Flags
● Programmable and Selectable Transmit and Receive FIFO Trigger
●Levels for DMA and Interrupt Generation
● Programmable Receive FIFO Trigger Levels for Software/Hardware
●Flow Control
● Software/Hardware Flow Control
● Programmable Xon/Xoff Characters
● Programmable Auto-RTS and Auto-CTS
● Optional Data Flow Resume by Xon Any Character
● DMA Signalling Capability for Both Received and Transmitted Data
● Supports 3.3-V Operation
● Software Selectable Baud Rate Generator
● Prescaler Provides Additional Divide By 4 Function
● Fast Access Time 2 Clock Cycle IOR/IOW Pulse Width
● Programmable Sleep Mode
● Programmable Serial Interface Characteristics
● 5-, 6-, 7-, or 8-Bit Characters
● Even, Odd, or No Parity Bit Generation and Detection
● 1, 1.5, or 2 Stop Bit Generation
● False Start Bit Detection
● Complete Status Reporting Capabilities in Both Normal and Sleep Mode
● Line Break Generation and Detection
● Internal Test and Loopback Capabilities
● Fully Prioritized Interrupt System Controls
● Modem Control Functions (CTS, RTS, DSR, DTR, RI, and CD)
