TYPE | DESCRIPTION |
---|
Mounting Style | Surface Mount |
Frequency | 700 kHz |
Number of Pins | 20 Pin |
Case/Package | HTSSOP-20 |
Number of Outputs | 1 Output |
Output Voltage | 3.3 V |
Output Current | 3 A |
Number of Positions | 20 Position |
Drain to Source Resistance (on) (Rds) | 85 mΩ |
Quiescent Current | 6.20 mA |
Number of Regulated Outputs | 1 Output |
Output Power | 3.85 W |
Switching Frequency | 550 kHz |
Thermal Shutdown | Yes |
Topology | Buck |
Input Voltage (Max) | 6 V |
Input Voltage (Min) | 3 V |
Output Voltage (Min) | 3.3 V |
Output Current (Max) | 3 A |
Operating Temperature (Max) | 85 ℃ |
Operating Temperature (Min) | -40 ℃ |
Accuracy | 1 % |
Supply Voltage | 3 V |
Supply Voltage (Min) | 4 V |
Input Voltage | 3V ~ 6V |
TYPE | DESCRIPTION |
---|
Product Lifecycle Status | Active |
Packaging | Cut Tape (CT) |
Size-Length | 6.5 mm |
Size-Width | 4.4 mm |
Size-Height | 1.15 mm |
Operating Temperature | -40℃ ~ 85℃ |
The TPS54316PWP is a SWIFT™ step-down PWM synchronous Buck Converter integrates all required active components. Included on the substrate with the listed features are a true, high performance, voltage error amplifier that provides high performance under transient conditions, an undervoltage-lockout circuit to prevent start-up until the input voltage reaches 3V, an internally and externally set slow-start circuit to limit in-rush currents and a powergood output useful for processor/logic reset, fault signalling and supply sequencing. It incorporates an UVLO circuit to keep the device disabled when the input voltage (VIN) is insufficient. During power up, internal circuits are held inactive until VIN exceeds the nominal UVLO threshold voltage of 2.95V. Once the UVLO start threshold is reached, device start-up begins. The device operates until VIN falls below the nominal UVLO stop threshold of 2.8V.
● Internally compensated for low parts count
● Fast transient response
● Load protected by peak current limit and thermal shutdown
● Integrated solution reduces board area
● Green product and no Sb/Br
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