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CD4094 Pinout Diagram

Part Series:CD4094 Series
Category:Shift Registers
Description:Shift Register, CD4094, Serial to Parallel, 1Element, 8Bit, DIP, 16Pins
Document:CD4094BF (10 Pages)

CD4094 Shift Registers Pinout Diagram

CD4094BE - TI Specifications

TYPE
DESCRIPTION
Mounting Style
Through Hole
Frequency
6 MHz
Number of Pins
16 Pin
Supply Voltage (DC)
15.0 V, 18.0 V (max)
Case/Package
PDIP-16
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CD4094BE - TI Function Overview

The CD4094BE is a CMOS 8-stage Shift-and-Store Bus Register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive clock transitions. The data in each shift register stage is transferred to the storage register when the strobe input is high. Data in the storage register appears at the outputs whenever the output-enable signal is high. Data is available at the QS serial output terminal on positive clock edges to allow for high-speed operation in cascaded systems in which the clock rise time is fast. The same serial information, available at the Q"S terminal on the next negative clock edge, provides a means for cascading CD4094BE devices when the clock rise time is slow.
3-state parallel outputs for connection to common bus
Separate serial outputs synchronous to both positive and negative clock edges for cascading
Medium speed operation (5MHz at 10V)
Standardized, symmetrical output characteristics
100% Tested for quiescent current at 20V
Maximum input current of 1µA at 18V
Green product
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