| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 8 Pin |
| Supply Voltage (DC) | 1.20V (min) |
| Case/Package | VSSOP-8 |
| Number of Circuits | 1 Circuit |
| Number of Channels | 2 Channel |
| Number of Positions | 8 Position |
| Number of Bits | 2 Bit |
| Operating Temperature (Max) | 125 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Number of Output Channels | 1 Channel |
| Supply Voltage | 1.2V ~ 5.5V |
| Supply Voltage (Max) | 5.5 V |
| Supply Voltage (Min) | 1.2 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Cut Tape (CT) |
| Size-Height | 0.85 mm |
| Operating Temperature | -40℃ ~ 125℃ (TA) |
The 74LVC2T45DC,125 is a dual supply Translating Transceiver with 3-state outputs that enable bidirectional level translation. It features two 2-bit input-output ports, a direction control input and dual supply pins. Both VCC(A) and VCC(B) can be supplied at any voltage between 1.2 and 5.5V making the device suitable for translating between any of the low voltage nodes. Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A port and B port are in the high-impedance OFF-state.
● High noise immunity
● Suspend mode
● IOFF circuitry provides partial power-down mode operation
● Complies with JEDEC standard
● Latch-up performance exceeds 100mA per JESD 78 class II
● Inputs accept voltages up to 5.5V
● Low power consumption - 16µA maximum ICC
● ±24mA Output drive
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