Product Details
●The AD9777 is the 16-bit member of a new pin-compatible family of high-speed dual Interpolating _TxDAC+_® converters with a maximum input data rate of 160 MSPS (no interpolation) and maximum DAC update rate of 400 MSPS (8x interpolation). They feature a selectable interpolation rate (2x/4x/8x) and a complex modulator that can mix at Fs/2, Fs/4 or Fs/8. All configuration is accomplished through an easy to use 3- or 4-wire SPI interface.
●When used with an external quadrature modulator (such as the AD8345/AD8346/AD8349) the AD977X can be used implement a more traditional baseband I/Q architecture or an image reject upconversion architecture by using its internal complex (I&Q) mixer. The latter architecture may be well suited for those applications demanding high modulation accuracy (i.e. 64 QAM) that digital modulation inherently provides. This offers the added benefit of suppressing the image inherent in an analog mixing operation, consequently reducing the number of filtering stages, and therefore the cost of the hardware required to achieve 3G and broadband spectral emission specifications. User-accessible Gain and Offset correction is accessed through the SPI port and improves sideband suppression and LO feedthrough, respectively. A direct IF mode allows synthesis of intermediate frequencies (IFs) above 70 MHz.
●_TxDAC+_ is a registered trademark of Analog Devices, Inc.
●Applications
● Communications
● Analog quadrature modulation architecture
● 3G, multicarrier GSM, TDMA, CDMA systems
● Broadband wireless, point-to-point microwave radios
● Instrumentation/ATE
●### Features and Benefits
● 16-bit resolution, 160 MSPS/400 MSPS input/output data rate
● Selectable 2×/4×/8× interpolating filter
● Programmable channel gain and offset adjustment
● fS/4, fS/8 digital quadrature modulation capability
● Direct IF transmission mode for 70 MHz + IFs
● Enables image rejection architecture
● Fully compatible SPI® port
● Excellent ac performance SFDR −73 dBc @ 2 MHz to 35 MHz WCDMA ACPR 71 dB @ IF = 19.2 MHz
● Internal PLL clock multiplier
● Selectable internal clock divider
● Versatile clock input Differential/single-ended sine wave or TTL/CMOS/LVPECL compatible
● Please see data sheet for additional features
