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EPM7064AETC100-10
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EPM7064AETC100-10 Datasheet PDF (64 Pages)
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EPM7064AETC100-10 Specifications

EPM7064AETC100-10 Size & Package

EPM7064AETC100-10 Documents

Altera
64 Pages / 0.93 MByte
Altera
2 Pages / 0.48 MByte
Altera
12 Pages / 0.26 MByte
Altera
1 Pages / 0.13 MByte

EPM7064 Documents

Altera
Programmable logic , 64 macrocells, 4 logic array blocks, 36 I/O pins, 10ns
Altera
CPLD MAX 7000S Family 1.25K Gates 64 Macro Cells 100MHz CMOS Technology 5V 44Pin PLCC
Altera
CPLD MAX 7000S Family 1.25K Gates 64 Macro Cells 100MHz CMOS Technology 5V 100Pin TQFP
Altera
CPLD MAX 7000 Family 1.25K Gates 64 Macro Cells 100MHz CMOS Technology 5V 44Pin PLCC
Altera
CPLD MAX 7000S Family 1.25K Gates 64 Macro Cells 166.7MHz CMOS Technology 5V 44Pin PLCC
Altera
CPLD MAX 7000A Family 1.25K Gates 64 Macro Cells 100MHz CMOS Technology 3.3V 44Pin TQFP
Altera
CPLD MAX 7000A Family 1.25K Gates 64 Macro Cells 135.1MHz CMOS Technology 3.3V 44Pin TQFP
Altera
CPLD MAX 7000 Family 1.25K Gates 64 Macro Cells 76.9MHz CMOS Technology 5V 84Pin PLCC
Altera
CPLD MAX 7000A Family 1.25K Gates 64 Macro Cells 135.1MHz CMOS Technology 3.3V 44Pin TQFP
Altera
Ic Cpld 64mc 15ns 68plcc Ic Cpld 64mc 15ns 68plcc Ic Cpld 64mc 15ns 68plcc Ic Cpld 64mc 15ns 68plcc
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