description
●The TMS320C6202, TMS320C6202B, TMS320C6203, and TMS320C6204 devices are part of the TMS320C62x fixed-point DSP family in the TMS320C6000 platform. The ’C62x devices are based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.
●Highest Performance Fixed-Point Digital Signal Processors (DSPs) TMS320C62x
●– 5-, 4-, 3.33-ns Instruction Cycle Time
●– 200-, 250-, 300-MHz Clock Rate
●– Eight 32-Bit Instructions/Cycle
●– 1600, 2000, 2400 MIPS
●VelociTI™ Advanced Very Long Instruction
●Word (VLIW) ’C62x CPU Core
●– Eight Highly Independent Functional Units:
● – Six ALUs (32-/40-Bit)
● – Two 16-Bit Multipliers (32-Bit Result)
●– Load-Store Architecture With 32 32-Bit General-Purpose Registers
●– Instruction Packing Reduces Code Size
●– All Instructions Conditional
●Instruction Set Features
●– Byte-Addressable (8-, 16-, 32-Bit Data)
●– 8-Bit Overflow Protection
●– Saturation
●– Bit-Field Extract, Set, Clear
●– Bit-Counting
●– Normalization
●On-Chip SRAM
●– 1M-Bit (’C6204)
●– 3M-Bit (’C6202/’C6202B)
●– 7M-Bit (’C6203)
●32-Bit External Memory Interface (EMIF)
●– Glueless Interface to Synchronous Memories: SDRAM or SBSRAM
●– Glueless Interface to Asynchronous Memories: SRAM and EPROM
●– 52M-Byte Addressable External Memory Space
●Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel
